58 lines
2.3 KiB
Diff
58 lines
2.3 KiB
Diff
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From: Matthias Schiffer <mschiffer@universe-factory.net>
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Date: Thu, 6 Aug 2015 03:01:38 +0200
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Subject: ar71xx: fix ethernet initialization on QCA953x-based boards (TP-Link TL-WR841N/ND v9, Compex WPJ531)
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The initialization routines for these boards were relying on some (wrong)
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defaults for the QCA953x ethernet. Make these defaults explicit to prevent
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breaking them when the QCA953x defaults are fixed.
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Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
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diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c
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index c28afc6..3e5c2a2 100644
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--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c
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+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c
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@@ -109,12 +109,18 @@ static void __init tl_ap143_setup(void)
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ath79_register_mdio(0, 0x0);
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/* LAN */
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+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
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+ ath79_eth1_data.duplex = DUPLEX_FULL;
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+ ath79_switch_data.phy_poll_mask |= BIT(4);
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ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
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ath79_register_eth(1);
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/* WAN */
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ath79_switch_data.phy4_mii_en = 1;
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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+ ath79_eth0_data.duplex = DUPLEX_FULL;
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+ ath79_eth0_data.speed = SPEED_100;
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+ ath79_eth0_data.phy_mask = BIT(4);
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
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ath79_register_eth(0);
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diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c
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index bc13d70..e665a2e 100644
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--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c
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+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj531.c
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@@ -105,12 +105,19 @@ static void __init common_setup(void)
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ath79_register_mdio(0, 0x0);
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/* LAN */
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+ ath79_eth0_data.duplex = DUPLEX_FULL;
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+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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+ ath79_eth0_data.speed = SPEED_100;
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+ ath79_eth0_data.phy_mask = BIT(4);
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
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ath79_register_eth(0);
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/* WAN */
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ath79_switch_data.phy4_mii_en = 1;
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+ ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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+ ath79_eth1_data.speed = SPEED_100;
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+ ath79_switch_data.phy_poll_mask |= BIT(4);
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ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
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ath79_register_eth(1);
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