fixup! ipq40xx-chromium: add support for Google WiFi (Gale)

patches/openwrt/0018-ipq40xx-add-reset-button-for-Google-WiFi-Gale.patch

@@ -1,12 +1,15 @@
 From: Jan-Niklas Burfeind <git@aiyionpri.me>
-Date: Sat, 25 Mar 2023 19:55:41 +0100
+Date: Sun, 26 Mar 2023 22:50:42 +0200
-Subject: ipq40xx: google (gale) add reset button
+Subject: ipq40xx: add reset button for Google WiFi (Gale)
 
-add the external button (GPIO 57) as reset button
+Add the external reset button for use with OpenWrt.
 
 Co-authored-by: Brian Norris <computersforpeace@gmail.com>
 Signed-off-by: Jan-Niklas Burfeind <git@aiyionpri.me>
-(cherry picked from commit b10a7ce51c36d15c548f2e154c2c3b7016276518)
+Reviewed-by: Brian Norris <computersforpeace@gmail.com>
+Tested-by: Brian Norris <computersforpeace@gmail.com>
+Signed-off-by: David Bauer <mail@david-bauer.net>
+(cherry picked from commit 791550b94fc791866e486e52d3c4d1d0378966ff)
 
 diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts
 index 9448e5145e29c39d4f7bfc2b94a745b2ccc1cf2d..c48d6a75b391886840d1889ff0d3b091898e4996 100644

patches/openwrt/0019-ipq40xx-add-LED-functions-for-Google-WiFi.patch

@@ -1,14 +1,22 @@
 From: Jan-Niklas Burfeind <git@aiyionpri.me>
-Date: Mon, 27 Mar 2023 00:10:17 +0200
+Date: Mon, 27 Mar 2023 07:29:39 +0200
-Subject: ipq40xx: google (gale) add LED aliases
+Subject: ipq40xx: add LED functions for Google WiFi
 
-this is similar to
+Add LED function properties for the LED controller to avoid failing
-commit 583ac0e11df7 ("mpc85xx: update lp5521 led-controller node for 5.10"
+driver probe with kernel 5.15.
+
+While at it, also define the OpenWrt LED indicator patterns for this
+device.
+
+Ref commit 583ac0e11df7 ("mpc85xx: update lp5521 led-controller node for 5.10")
 
 Google uses white for running and red for an issue
 
 Signed-off-by: Jan-Niklas Burfeind <git@aiyionpri.me>
-(cherry picked from commit 2ae81ad14b915cd61dfa1931cab5e3ee430e2543)
+Tested-by: Andrijan Möcker <amo@ct.de>
+Reviewed-by: Brian Norris <computersforpeace@gmail.com>
+Signed-off-by: David Bauer <mail@david-bauer.net>
+(cherry picked from commit 9b005036f8d070594fc7f3374f82c81f0a692918)
 
 diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts
 index c48d6a75b391886840d1889ff0d3b091898e4996..173c6ff8041b8d75edda2e66dcad15f6e2b86ae9 100644

patches/openwrt/0020-kernel-Package-GOOGLE_FIRMWARE-drivers.patch

@@ -0,0 +1,46 @@
+From: Brian Norris <computersforpeace@gmail.com>
+Date: Sat, 19 Feb 2022 17:26:24 -0800
+Subject: kernel: Package GOOGLE_FIRMWARE drivers
+
+Useful for some Chromium OS based systems, like Google WiFi.
+
+Signed-off-by: Brian Norris <computersforpeace@gmail.com>
+(cherry picked from commit e5b009e532813d73fe7d3e3deb77b4a60c364913)
+
+diff --git a/package/kernel/linux/modules/other.mk b/package/kernel/linux/modules/other.mk
+index 36f4c8a57e98dc030ff0bbed894783e1e54f390c..178ab003d5d943fca359c8b22baa68c468a3a472 100644
+--- a/package/kernel/linux/modules/other.mk
++++ b/package/kernel/linux/modules/other.mk
+@@ -198,6 +198,32 @@ endef
+ $(eval $(call KernelPackage,eeprom-at25))
+ 
+ 
++define KernelPackage/google-firmware
++  SUBMENU:=$(OTHER_MENU)
++  TITLE:=Google firmware drivers (Coreboot, VPD, Memconsole)
++  KCONFIG:= \
++	CONFIG_GOOGLE_FIRMWARE=y \
++	CONFIG_GOOGLE_COREBOOT_TABLE \
++	CONFIG_GOOGLE_MEMCONSOLE \
++	CONFIG_GOOGLE_MEMCONSOLE_COREBOOT \
++	CONFIG_GOOGLE_VPD
++  FILES:= \
++	  $(LINUX_DIR)/drivers/firmware/google/coreboot_table.ko \
++	  $(LINUX_DIR)/drivers/firmware/google/memconsole.ko \
++	  $(LINUX_DIR)/drivers/firmware/google/memconsole-coreboot.ko \
++	  $(LINUX_DIR)/drivers/firmware/google/vpd-sysfs.ko
++  AUTOLOAD:=$(call AutoProbe,coreboot_table memconsole-coreboot vpd-sysfs)
++endef
++
++define KernelPackage/google-firmware/description
++  Kernel modules for Google firmware drivers. Useful for examining firmware and
++  boot details on devices using a Google bootloader based on Coreboot. Provides
++  files like /sys/firmware/log and /sys/firmware/vpd.
++endef
++
++$(eval $(call KernelPackage,google-firmware))
++
++
+ define KernelPackage/gpio-f7188x
+   SUBMENU:=$(OTHER_MENU)
+   TITLE:=Fintek F718xx/F818xx GPIO Support

patches/openwrt/0021-ipq40xx-qcom_scm-Fix-cold-boot-address-command.patch

@@ -0,0 +1,143 @@
+From: Brian Norris <computersforpeace@gmail.com>
+Date: Sat, 12 Sep 2020 15:41:23 -0700
+Subject: ipq40xx: qcom_scm: Fix cold boot address command
+
+See my upstream questions:
+https://lore.kernel.org/linux-arm-msm/20200913201608.GA3162100@bDebian/
+
+This effectively reverts upstream Linux commit 13e77747800e ("firmware:
+qcom: scm: Use atomic SCM for cold boot"), because Google WiFi boot
+firmwares don't support the atomic variant.
+
+This fixes SMP support for Google WiFi.
+
+Signed-off-by: Brian Norris <computersforpeace@gmail.com>
+(cherry picked from commit 26af098e0e97124a741c5c96a824b17e7f1b6434)
+
+diff --git a/target/linux/ipq40xx/patches-5.10/421-firmware-qcom-scm-cold-boot-address.patch b/target/linux/ipq40xx/patches-5.10/421-firmware-qcom-scm-cold-boot-address.patch
+new file mode 100644
+index 0000000000000000000000000000000000000000..accf3e968606b84e1b35653ec82b9c1f4018ee68
+--- /dev/null
++++ b/target/linux/ipq40xx/patches-5.10/421-firmware-qcom-scm-cold-boot-address.patch
+@@ -0,0 +1,121 @@
++--- a/drivers/firmware/qcom_scm-legacy.c
+++++ b/drivers/firmware/qcom_scm-legacy.c
++@@ -13,6 +13,9 @@
++ #include <linux/arm-smccc.h>
++ #include <linux/dma-mapping.h>
++ 
+++#include <asm/cacheflush.h>
+++#include <asm/outercache.h>
+++
++ #include "qcom_scm.h"
++ 
++ static DEFINE_MUTEX(qcom_scm_lock);
++@@ -117,6 +120,25 @@ static void __scm_legacy_do(const struct
++ 	} while (res->a0 == QCOM_SCM_INTERRUPTED);
++ }
++ 
+++static void qcom_scm_inv_range(unsigned long start, unsigned long end)
+++{
+++	u32 cacheline_size, ctr;
+++
+++	asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr));
+++	cacheline_size = 4 << ((ctr >> 16) & 0xf);
+++
+++	start = round_down(start, cacheline_size);
+++	end = round_up(end, cacheline_size);
+++	outer_inv_range(start, end);
+++	while (start < end) {
+++		asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start)
+++		     : "memory");
+++		start += cacheline_size;
+++	}
+++	dsb();
+++	isb();
+++}
+++
++ /**
++  * qcom_scm_call() - Sends a command to the SCM and waits for the command to
++  * finish processing.
++@@ -160,10 +182,16 @@ int scm_legacy_call(struct device *dev,
++ 
++ 	rsp = scm_legacy_command_to_response(cmd);
++ 
++-	cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);
++-	if (dma_mapping_error(dev, cmd_phys)) {
++-		kfree(cmd);
++-		return -ENOMEM;
+++	if (dev) {
+++		cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);
+++		if (dma_mapping_error(dev, cmd_phys)) {
+++			kfree(cmd);
+++			return -ENOMEM;
+++		}
+++	} else {
+++		cmd_phys = virt_to_phys(cmd);
+++		__cpuc_flush_dcache_area(cmd, alloc_len);
+++		outer_flush_range(cmd_phys, cmd_phys + alloc_len);
++ 	}
++ 
++ 	smc.args[0] = 1;
++@@ -179,13 +207,26 @@ int scm_legacy_call(struct device *dev,
++ 		goto out;
++ 
++ 	do {
++-		dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len,
++-					sizeof(*rsp), DMA_FROM_DEVICE);
+++		if (dev) {
+++			dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) +
+++						cmd_len, sizeof(*rsp),
+++						DMA_FROM_DEVICE);
+++		} else {
+++			unsigned long start = (uintptr_t)cmd + sizeof(*cmd) +
+++					      cmd_len;
+++			qcom_scm_inv_range(start, start + sizeof(*rsp));
+++		}
++ 	} while (!rsp->is_complete);
++ 
++-	dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +
++-				le32_to_cpu(rsp->buf_offset),
++-				resp_len, DMA_FROM_DEVICE);
+++	if (dev) {
+++		dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +
+++					le32_to_cpu(rsp->buf_offset),
+++					resp_len, DMA_FROM_DEVICE);
+++	} else {
+++		unsigned long start = (uintptr_t)cmd + sizeof(*cmd) + cmd_len +
+++				      le32_to_cpu(rsp->buf_offset);
+++		qcom_scm_inv_range(start, start + resp_len);
+++	}
++ 
++ 	if (res) {
++ 		res_buf = scm_legacy_get_response_buffer(rsp);
++@@ -193,7 +234,8 @@ int scm_legacy_call(struct device *dev,
++ 			res->result[i] = le32_to_cpu(res_buf[i]);
++ 	}
++ out:
++-	dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);
+++	if (dev)
+++		dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);
++ 	kfree(cmd);
++ 	return ret;
++ }
++--- a/drivers/firmware/qcom_scm.c
+++++ b/drivers/firmware/qcom_scm.c
++@@ -344,6 +344,17 @@ int qcom_scm_set_cold_boot_addr(void *en
++ 	desc.args[0] = flags;
++ 	desc.args[1] = virt_to_phys(entry);
++ 
+++	/*
+++	 * Factory firmware doesn't support the atomic variant. Non-atomic SCMs
+++	 * require ugly DMA invalidation support that was dropped upstream a
+++	 * while ago. For more info, see:
+++	 *
+++	 *  [RFC] qcom_scm: IPQ4019 firmware does not support atomic API?
+++	 *  https://lore.kernel.org/linux-arm-msm/20200913201608.GA3162100@bDebian/
+++	 */
+++	if (of_machine_is_compatible("google,wifi"))
+++		return qcom_scm_call(__scm ? __scm->dev : NULL, &desc, NULL);
+++
++ 	return qcom_scm_call_atomic(__scm ? __scm->dev : NULL, &desc, NULL);
++ }
++ EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);