69ce123457
The new ath9k/ath10k based devices are only available in OpenWrt trunk. The relevant patches have to backported to add support for them in Gluon Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
59 lines
1.9 KiB
Diff
59 lines
1.9 KiB
Diff
From: Sven Eckelmann <sven.eckelmann@open-mesh.com>
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Date: Wed, 23 Mar 2016 12:52:09 +0000
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Subject: ar71xx: Use private version of ath79_setup_qca955x_eth_cfg for MR900
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The MR900 must unset some bits in ETH_CFG which were set by u-boot to work
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correctly under OpenWrt. But the global function
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ath79_setup_qca955x_eth_cfg will not unset all of them to increase the
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backward compatiblity with older mach-* files. A private (simplified)
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version for MR900 can be used instead.
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Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
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Backport of r49069
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Forwarded: https://patchwork.ozlabs.org/patch/624187/
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diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c
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index 3634bf0..b439f58 100644
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--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c
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+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c
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@@ -110,6 +110,28 @@ static struct mdio_board_info mr900_mdio0_info[] = {
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},
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};
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+static void __init mr900_setup_qca955x_eth_cfg(u32 mask,
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+ unsigned int rxd,
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+ unsigned int rxdv,
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+ unsigned int txd,
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+ unsigned int txe)
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+{
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+ void __iomem *base;
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+ u32 t;
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+
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+ base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
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+
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+ t = mask;
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+ t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
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+ t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
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+ t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
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+ t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
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+
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+ __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
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+
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+ iounmap(base);
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+}
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+
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static void __init mr900_setup(void)
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{
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u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
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@@ -139,7 +161,7 @@ static void __init mr900_setup(void)
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}
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pdata->use_eeprom = true;
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- ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
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+ mr900_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
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ath79_register_mdio(0, 0x0);
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mdiobus_register_board_info(mr900_mdio0_info,
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