47 lines
1.5 KiB
Diff
47 lines
1.5 KiB
Diff
From: Matthias Schiffer <mschiffer@universe-factory.net>
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Date: Fri, 13 May 2016 20:59:44 +0200
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Subject: ath79: dev-eth: fix QCA9561 set phy interface mode and mask
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QCA9563 and QCA9561 are two series of Qualcomm SoC Dragonfly. The only different
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is QCA9563 w/o internal switch. It has one GMAC with SGMII interface. But they
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have the same device ID(0x1150). So they share the same codes.
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Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org>
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Backport of OpenWrt r46971
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diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
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index ff94e2e..31d2438 100644
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--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
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+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
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@@ -633,7 +633,6 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
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case ATH79_SOC_AR9330:
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case ATH79_SOC_AR9331:
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case ATH79_SOC_QCA9533:
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- case ATH79_SOC_QCA9561:
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case ATH79_SOC_TP9343:
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pdata->phy_if_mode = PHY_INTERFACE_MODE_MII;
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break;
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@@ -667,6 +666,11 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
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}
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break;
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+ case ATH79_SOC_QCA9561:
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+ if (!pdata->phy_if_mode)
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+ pdata->phy_if_mode = PHY_INTERFACE_MODE_MII;
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+ break;
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+
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default:
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BUG();
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}
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@@ -1035,7 +1039,8 @@ void __init ath79_register_eth(unsigned int id)
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AR933X_RESET_GE0_MDIO;
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pdata->set_speed = ath79_set_speed_dummy;
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- pdata->phy_mask = BIT(4);
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+ if (!pdata->phy_mask)
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+ pdata->phy_mask = BIT(4);
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} else {
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pdata->reset_bit = AR933X_RESET_GE1_MAC |
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AR933X_RESET_GE1_MDIO;
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